Nexperia B.V. 8-stage shift-and-store bus register 74HCT4094D,118

Description
The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) is HIGH. A LOW on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Features and benefits Complies with JEDEC standard JESD7A Input levels: For 74HC4094: CMOS level For 74HCT4094: TTL level Low-power dissipation ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C Applications Serial-to-parallel data conversion Remote control holding register
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Description
The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) is HIGH. A LOW on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Features and benefits Complies with JEDEC standard JESD7A Input levels: For 74HC4094: CMOS level For 74HCT4094: TTL level Low-power dissipation ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C Applications Serial-to-parallel data conversion Remote control holding register
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Suppliers

Company
Product
Description
Supplier Links
8-stage shift-and-store bus register - 74HCT4094D,118 - Nexperia B.V.
Nijmegen, Netherlands
8-stage shift-and-store bus register
74HCT4094D,118
8-stage shift-and-store bus register 74HCT4094D,118
The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) is HIGH. A LOW on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Features and benefits Complies with JEDEC standard JESD7A Input levels: For 74HC4094: CMOS level For 74HCT4094: TTL level Low-power dissipation ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C Applications Serial-to-parallel data conversion Remote control holding register

The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) is HIGH. A LOW on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features and benefits

  • Complies with JEDEC standard JESD7A
  • Input levels:
    • For 74HC4094: CMOS level
    • For 74HCT4094: TTL level
  • Low-power dissipation
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Applications

  • Serial-to-parallel data conversion
  • Remote control holding register
Supplier's Site Datasheet
 - 74HCT4094D,118 - Rochester Electronics
Newburyport, MA, United States
Serial In Parallel Out, HCT Series, 8-Bit, Right Direction, True Output, CMOS, PDSO16

Serial In Parallel Out, HCT Series, 8-Bit, Right Direction, True Output, CMOS, PDSO16

Supplier's Site Datasheet
Shift Registers - 1727-2060-2-ND - DigiKey
Thief River Falls, MN, United States
Shift Registers
1727-2060-2-ND
Shift Registers 1727-2060-2-ND
Shift Shift Register 1 Element 8 Bit 16-SO

Shift Shift Register 1 Element 8 Bit 16-SO

Buy Now Datasheet
Shift Registers - 1727-2060-6-ND - DigiKey
Thief River Falls, MN, United States
Shift Registers
1727-2060-6-ND
Shift Registers 1727-2060-6-ND
Shift Shift Register 1 Element 8 Bit 16-SO

Shift Shift Register 1 Element 8 Bit 16-SO

Buy Now Datasheet
Shift Registers - 1727-2060-1-ND - DigiKey
Thief River Falls, MN, United States
Shift Registers
1727-2060-1-ND
Shift Registers 1727-2060-1-ND
Shift Shift Register 1 Element 8 Bit 16-SO

Shift Shift Register 1 Element 8 Bit 16-SO

Buy Now Datasheet
Integrated Circuits (ICs) - Logic - Shift Registers - 74HCT4094D,118 - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Shift Registers
74HCT4094D,118
Integrated Circuits (ICs) - Logic - Shift Registers 74HCT4094D,118
IC 8STAGE SHIFT/STORE BUS 16SOIC

IC 8STAGE SHIFT/STORE BUS 16SOIC

Supplier's Site
Ic, 74Hct Cmos, Smd, 74Hct4094; Logic Family / Base Number Nexperia - 99K0561 - Newark, An Avnet Company
Chicago, IL, United States
Ic, 74Hct Cmos, Smd, 74Hct4094; Logic Family / Base Number Nexperia
99K0561
Ic, 74Hct Cmos, Smd, 74Hct4094; Logic Family / Base Number Nexperia 99K0561
IC, 74HCT CMOS, SMD, 74HCT4094; Logic Family / Base Number:74HCT4094; Shift Register Function:Serial to Parallel; No. of Elements:1 Element; No. of Bits Per Element:8bit; Logic Case Style:SOIC; No. of Pins:16Pins; Supply Voltage RoHS Compliant: Yes

IC, 74HCT CMOS, SMD, 74HCT4094; Logic Family / Base Number:74HCT4094; Shift Register Function:Serial to Parallel; No. of Elements:1 Element; No. of Bits Per Element:8bit; Logic Case Style:SOIC; No. of Pins:16Pins; Supply Voltage RoHS Compliant: Yes

Supplier's Site Datasheet
Shift Registers - 74HCT4094D,118 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Shift Registers
74HCT4094D,118
Shift Registers 74HCT4094D,118
Shift Shift Register 1 Element 8 Bit 16-SO

Shift Shift Register 1 Element 8 Bit 16-SO

Buy Now Datasheet
Logic - Shift Registers - 74HCT4094D,118 - Lingto Electronic Limited
Shenzhen, China
Logic - Shift Registers
74HCT4094D,118
Logic - Shift Registers 74HCT4094D,118
IC 8STAGE SHIFT/STORE BUS 16SOIC

IC 8STAGE SHIFT/STORE BUS 16SOIC

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Rochester Electronics DigiKey Shenzhen Shengyu Electronics Technology Limited Newark, An Avnet Company Quarktwin Technology Ltd. Lingto Electronic Limited
Product Category Shift Registers Shift Registers Shift Registers Shift Registers Shift Registers Shift Registers Shift Registers
Product Number 74HCT4094D,118 74HCT4094D,118 1727-2060-2-ND 74HCT4094D,118 99K0561 74HCT4094D,118 74HCT4094D,118
Product Name 8-stage shift-and-store bus register Shift Registers Integrated Circuits (ICs) - Logic - Shift Registers Ic, 74Hct Cmos, Smd, 74Hct4094; Logic Family / Base Number Nexperia Shift Registers Logic - Shift Registers
Supply Voltage 5V; 4.5 - 5.5 4.5V ~ 5.5V 4.5V ~ 5.5V
Features ESD Protection
Package Type Other; SOT109-1 Other; SOT109 SOIC; Other; "16-SOIC (0.154"", 3.90mm Width)" SOIC SOIC; Other; 16-SOIC (0.154\", 3.90mm Width)
Logic Family TTL CMOS
Clock Frequency 86 MHz
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