- Trained on our vast library of engineering resources.

Nexperia B.V. Dual JK flip-flop with set and reset; positive-edge-trigger 74HCT109D,653

Request a Quote Datasheet

Suppliers

Company
Product
Description
Supplier Links
Dual JK flip-flop with set and reset; positive-edge-trigger - 74HCT109D,653 - Nexperia B.V.
Nijmegen, Netherlands
Dual JK flip-flop with set and reset; positive-edge-trigger
74HCT109D,653
Dual JK flip-flop with set and reset; positive-edge-trigger 74HCT109D,653
The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs and complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The JK design allows operation as a D-type flip-flop by connecting the J and K inputs together. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Features and benefits J and K inputs for easy D-type flip-flop Toggle flip-flop or "do nothing" mode Wide supply voltage range: For 74HC109: from 2.0 V to 6.0 V For 74HCT109: from 4.5 V to 5.5 V CMOS low power dissipation High noise immunity Input levels: For 74HC109: CMOS level For 74HCT109: TTL level Latch-up performance exceeds 100 mA per JESD 78 Class II Level B 74HC109 complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) 74HCT109 complies with JEDEC standard JESD7A (2.0 V to 6.0 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C

The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs and complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The JK design allows operation as a D-type flip-flop by connecting the J and K inputs together. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

Features and benefits

  • J and K inputs for easy D-type flip-flop
  • Toggle flip-flop or "do nothing" mode
  • Wide supply voltage range:
    • For 74HC109: from 2.0 V to 6.0 V
    • For 74HCT109: from 4.5 V to 5.5 V
  • CMOS low power dissipation
  • High noise immunity
  • Input levels:
    • For 74HC109: CMOS level
    • For 74HCT109: TTL level
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • 74HC109 complies with JEDEC standards:
    • JESD8C (2.7 V to 3.6 V)
    • JESD7A (2.0 V to 6.0 V)
  • 74HCT109 complies with JEDEC standard JESD7A (2.0 V to 6.0 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supplier's Site Datasheet
Flip Flops - 1727-4086-1-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-4086-1-ND
Flip Flops 1727-4086-1-ND
Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width)

Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width)

Supplier's Site Datasheet
Flip Flops - 1727-4086-6-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-4086-6-ND
Flip Flops 1727-4086-6-ND
Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width)

Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width)

Supplier's Site Datasheet
Flip Flops - 1727-4086-2-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-4086-2-ND
Flip Flops 1727-4086-2-ND
Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width)

Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width)

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Flip Flops - 74HCT109D,653 - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Flip Flops
74HCT109D,653
Integrated Circuits (ICs) - Logic - Flip Flops 74HCT109D,653
IC FF JK TYPE DUAL 1BIT 16SO

IC FF JK TYPE DUAL 1BIT 16SO

Supplier's Site
Flip Flops - 74HCT109D,653 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flops
74HCT109D,653
Flip Flops 74HCT109D,653
Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width)

Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width)

Supplier's Site Datasheet
Logic - Flip Flops - 74HCT109D,653 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74HCT109D,653
Logic - Flip Flops 74HCT109D,653
IC FF JK TYPE DUAL 1BIT 16SO

IC FF JK TYPE DUAL 1BIT 16SO

Supplier's Site Datasheet
Flip Flop, Jk, -40 To 125Deg C Rohs Compliant Nexperia - 74AH2334 - Newark, An Avnet Company
Chicago, IL, United States
Flip Flop, Jk, -40 To 125Deg C Rohs Compliant Nexperia
74AH2334
Flip Flop, Jk, -40 To 125Deg C Rohs Compliant Nexperia 74AH2334
FLIP FLOP, JK, -40 TO 125DEG C ROHS COMPLIANT: YES

FLIP FLOP, JK, -40 TO 125DEG C ROHS COMPLIANT: YES

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. DigiKey Shenzhen Shengyu Electronics Technology Limited Quarktwin Technology Ltd. Lingto Electronic Limited Newark, An Avnet Company
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74HCT109D,653 1727-4086-1-ND 74HCT109D,653 74HCT109D,653 74HCT109D,653 74AH2334
Product Name Dual JK flip-flop with set and reset; positive-edge-trigger Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops Flip Flops Logic - Flip Flops Flip Flop, Jk, -40 To 125Deg C Rohs Compliant Nexperia
Flip-Flop Type J-K J-K J-K
Triggering Positive-edge Triggered Positive-edge Triggered
Supply Voltage 5V; 4.5 - 5.5 4.5V ~ 5.5V 4.5V ~ 5.5V
Features ESD Protection
Propagation Delay 17 ns 35 ns
Unlock Full Specs
to access all available technical data

Similar Products

Dual D-type flip-flop with set and reset; positive-edge trigger - 74AHCT74D,118 - Nexperia B.V.
Specs
Flip-Flop Type D
Triggering Positive-edge Triggered
Supply Voltage 5V; 4.5 - 5.5
View Details
7 suppliers
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state - 74LVCH16374ADGG,11 - Nexperia B.V.
Specs
Flip-Flop Type D
Supply Voltage 1.2V; 1.5V; 1.8V; 2.5V; 3V; 3.3V; 3.6V; 1.2 - 3.6
Output Characteristics 3-State
View Details
5 suppliers
Quad D-type flip-flop with reset; positive-edge trigger - 74HCT175PW,118 - Nexperia B.V.
Specs
Flip-Flop Type D
Triggering Positive-edge Triggered
Supply Voltage 5V; 4.5 - 5.5
View Details
6 suppliers
Octal D-type flip-flop; positive edge-trigger; 3-state - 74ALVC574D,118 - Nexperia B.V.
Specs
Flip-Flop Type D
Triggering Positive-edge Triggered
Supply Voltage 1.8V; 2.5V; 3V; 3.3V; 3.6V; 1.65 - 3.6
View Details
7 suppliers