Nexperia B.V. Octal D-type flip-flop; positive edge-trigger; 3-state 74HC574BQX

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Octal D-type flip-flop; positive edge-trigger; 3-state - 74HC574BQX - Nexperia B.V.
Nijmegen, Netherlands
Octal D-type flip-flop; positive edge-trigger; 3-state
74HC574BQX
Octal D-type flip-flop; positive edge-trigger; 3-state 74HC574BQX
The 74HC574; 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) Input levels: For 74HC574: CMOS level For 74HCT574: TTL level 3-state non-inverting outputs for bus oriented applications 8-bit positive, edge-triggered register Common 3-state output enable input ESD protection: HBM JESD22-A114F exceeds 2 kV MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C

The 74HC574; 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features and benefits

  • Wide supply voltage range from 2.0 V to 6.0 V
  • CMOS low power dissipation
  • High noise immunity
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards:
    • JESD8C (2.7 V to 3.6 V)
    • JESD7A (2.0 V to 6.0 V)
  • Input levels:
    • For 74HC574: CMOS level
    • For 74HCT574: TTL level
  • 3-state non-inverting outputs for bus oriented applications
  • 8-bit positive, edge-triggered register
  • Common 3-state output enable input
  • ESD protection:
    • HBM JESD22-A114F exceeds 2 kV
    • MM JESD22-A115-A exceeds 200 V
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supplier's Site Datasheet
Flip Flops - 1727-74HC574BQXTR-ND - DigiKey
Thief River Falls, MN, United States
IC FF D-TYPE SNGL 8BIT 20DHVQFN

IC FF D-TYPE SNGL 8BIT 20DHVQFN

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Flip Flops - 74HC574BQX - Acme Chip Technology Co., Limited
Shenzhen, China
Integrated Circuits (ICs) - Logic - Flip Flops
74HC574BQX
Integrated Circuits (ICs) - Logic - Flip Flops 74HC574BQX
IC FF D-TYPE SNGL 8BIT 20DHVQFN

IC FF D-TYPE SNGL 8BIT 20DHVQFN

Supplier's Site

Technical Specifications

  Nexperia B.V. DigiKey Acme Chip Technology Co., Limited
Product Category Flip-Flops Flip-Flops Flip-Flops
Product Number 74HC574BQX 1727-74HC574BQXTR-ND 74HC574BQX
Product Name Octal D-type flip-flop; positive edge-trigger; 3-state Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops
Flip-Flop Type D D
Triggering Positive-edge Triggered Positive-edge Triggered
Supply Voltage 2.5V; 3V; 3.3V; 3.6V; 5V; 2.0 - 6.0 2V ~ 6V
Output Characteristics 3-State 3-State
Features ESD Protection
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