Nexperia B.V. Quad D-type flip-flop; positive-edge trigger; 3-state 74HC173PW,118

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Quad D-type flip-flop; positive-edge trigger; 3-state - 74HC173PW,118 - Nexperia B.V.
Nijmegen, Netherlands
Quad D-type flip-flop; positive-edge trigger; 3-state
74HC173PW,118
Quad D-type flip-flop; positive-edge trigger; 3-state 74HC173PW,118
The 74HC173; 74HCT173 is a quad positive-edge triggered D-type flip-flop. The device features clock (CP), master reset (MR), two input enable (E1, E2) and two output enable (OE1, OE2) inputs. When the input enables are LOW, the outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on either input enable will cause the device to go into a hold mode, outputs hold their previous state independently of clock and data inputs. A HIGH on MR forces the outputs LOW independently of clock and data inputs. A HIGH on either output enable pin causes the outputs to assume a high-impedance OFF-state. Operation of the output enable inputs does not affect the state of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Features and benefits Complies with JEDEC standard no. 7A Input levels: For 74HC173: CMOS level For 74HCT173: TTL level Gated input enable for hold (do nothing) mode Gated output enable control mode Edge-triggered D-type register Asynchronous master reset ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +85 °C and -40 °C to +125 °C

The 74HC173; 74HCT173 is a quad positive-edge triggered D-type flip-flop. The device features clock (CP), master reset (MR), two input enable (E1, E2) and two output enable (OE1, OE2) inputs. When the input enables are LOW, the outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on either input enable will cause the device to go into a hold mode, outputs hold their previous state independently of clock and data inputs. A HIGH on MR forces the outputs LOW independently of clock and data inputs. A HIGH on either output enable pin causes the outputs to assume a high-impedance OFF-state. Operation of the output enable inputs does not affect the state of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features and benefits

  • Complies with JEDEC standard no. 7A
  • Input levels:
    • For 74HC173: CMOS level
    • For 74HCT173: TTL level
  • Gated input enable for hold (do nothing) mode
  • Gated output enable control mode
  • Edge-triggered D-type register
  • Asynchronous master reset
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
Supplier's Site Datasheet
Yishun, Singapore
Integrated Circuits (ICs) - Logic - Flip Flops
1040308-74HC173PW,118
Integrated Circuits (ICs) - Logic - Flip Flops 1040308-74HC173PW,118
Win Source Part Number: 1040308-74HC173PW,11 8 Category: Integrated Circuits (ICs)>Logic - Flip Flops Series: 74HC Type: D-Type Package: Tape & Reel (TR) Standard Package: 2,500 Mounting: SMD (SMT) Output Type: Tri-State, Non-Inverted Current - Output High, Low: 7.8mA, 7.8mA Function: Master Reset Number of Elements: 1 Number of Bits per Element: 4 Max Propagation Delay @ V, Max CL: 30ns @ 6V, 50pF Trigger Type: Positive Edge Input Capacitance: 3.5 pF Voltage - Supply: 2V ~ 6V Package / Case: 16-TSSOP (0.173", 4.40mm Width) Supplier Device Package: 16-TSSOP Temperature Range - Operating: -40°C ~ 125°C (TA) Clock Frequency: 95 MHz Alternative Parts (Cross-Reference): CD74HC173PWR; 74HC175PW,112; SN74HC175PW; MM74HC175MTCX; 74HC175PW,118; CD74HC173PW"74HC173P W,118"; 74HC173PW 118; 74HC173PW118; ECCN: EAR99 Fake Threat In the Open Market: 82 pct. MSL Level: 1 (Unlimited) Current - Quiescent (Iq): 4 µA REACH Status: REACH Unaffected HTSUS: 8542.39.0001 Mfr: Nexperia USA Inc. Other Names: 74HC173PW-T,74HC173P W-T-ND,935189550118 Base Product Number: 74HC173

Win Source Part Number: 1040308-74HC173PW,118
Category: Integrated Circuits (ICs)>Logic - Flip Flops
Series: 74HC
Type: D-Type
Package: Tape & Reel (TR)
Standard Package: 2,500
Mounting: SMD (SMT)
Output Type: Tri-State, Non-Inverted
Current - Output High, Low: 7.8mA, 7.8mA
Function: Master Reset
Number of Elements: 1
Number of Bits per Element: 4
Max Propagation Delay @ V, Max CL: 30ns @ 6V, 50pF
Trigger Type: Positive Edge
Input Capacitance: 3.5 pF
Voltage - Supply: 2V ~ 6V
Package / Case: 16-TSSOP (0.173", 4.40mm Width)
Supplier Device Package: 16-TSSOP
Temperature Range - Operating: -40°C ~ 125°C (TA)
Clock Frequency: 95 MHz
Alternative Parts (Cross-Reference): CD74HC173PWR; 74HC175PW,112; SN74HC175PW; MM74HC175MTCX; 74HC175PW,118; CD74HC173PW"74HC173PW,118"; 74HC173PW 118; 74HC173PW118;
ECCN: EAR99
Fake Threat In the Open Market: 82 pct.
MSL Level: 1 (Unlimited)
Current - Quiescent (Iq): 4 µA
REACH Status: REACH Unaffected
HTSUS: 8542.39.0001
Mfr: Nexperia USA Inc.
Other Names: 74HC173PW-T,74HC173PW-T-ND,935189550118
Base Product Number: 74HC173

Supplier's Site Datasheet
Flip Flops - 1727-74HC173PW,118TR-ND - DigiKey
Thief River Falls, MN, United States
IC FF D-TYPE SNGL 4BIT 16TSSOP

IC FF D-TYPE SNGL 4BIT 16TSSOP

Supplier's Site Datasheet
Flip Flops - 1727-74HC173PW,118DKR-ND - DigiKey
Thief River Falls, MN, United States
IC FF D-TYPE SNGL 4BIT 16TSSOP

IC FF D-TYPE SNGL 4BIT 16TSSOP

Supplier's Site Datasheet
Flip Flops - 1727-74HC173PW,118CT-ND - DigiKey
Thief River Falls, MN, United States
IC FF D-TYPE SNGL 4BIT 16TSSOP

IC FF D-TYPE SNGL 4BIT 16TSSOP

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Flip Flops - 74HC173PW,118 - Acme Chip Technology Co., Limited
Shenzhen, China
Integrated Circuits (ICs) - Logic - Flip Flops
74HC173PW,118
Integrated Circuits (ICs) - Logic - Flip Flops 74HC173PW,118
IC FF D-TYPE SNGL 4BIT 16TSSOP

IC FF D-TYPE SNGL 4BIT 16TSSOP

Supplier's Site
Shenzhen, China
Integrated Circuits (ICs) - Logic - Flip Flops
74HC173PW,118
Integrated Circuits (ICs) - Logic - Flip Flops 74HC173PW,118
IC FF D-TYPE SNGL 4BIT 16TSSOP

IC FF D-TYPE SNGL 4BIT 16TSSOP

Supplier's Site
Logic - Flip Flops -  - Nova Technology(HK) Co.,Ltd
Futian District, Shenzhen, China
Logic - Flip Flops
Logic - Flip Flops
Flip Flop 1 Element D-Type 4 Bit Positive Edge 16-TSSOP (0.173

Flip Flop 1 Element D-Type 4 Bit Positive Edge 16-TSSOP (0.173

Supplier's Site Datasheet
Logic - Flip Flops - 74HC173PW,118 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74HC173PW,118
Logic - Flip Flops 74HC173PW,118
IC FF D-TYPE SNGL 4BIT 16TSSOP

IC FF D-TYPE SNGL 4BIT 16TSSOP

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Win Source Electronics DigiKey Acme Chip Technology Co., Limited Acme Chip Technology Co., Limited Nova Technology(HK) Co.,Ltd Lingto Electronic Limited
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74HC173PW,118 1040308-74HC173PW,118 1727-74HC173PW,118TR-ND 74HC173PW,118 74HC173PW,118 74HC173PW,118
Product Name Quad D-type flip-flop; positive-edge trigger; 3-state Integrated Circuits (ICs) - Logic - Flip Flops Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops Logic - Flip Flops Logic - Flip Flops
Flip-Flop Type D D D
Triggering Positive-edge Triggered Positive-edge Triggered; Positive Edge Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered
Supply Voltage 2.5V; 3V; 3.3V; 3.6V; 5V; 2.0 - 6.0 2V ~ 6V 2V ~ 6V 2V ~ 6V 2 V ~ 6 V
Output Characteristics 3-State 3-State 3-State; Tri-State, Non-Inverted 3-State; Tri-State, Non-Inverted
Features ESD Protection
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