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Nexperia B.V. Low-power dual PCB configurable multiple function gate 74AUP2G57GU-Q100X

Description
The 74AUP2G57-Q100 is a dual configurable multiple function gate with Schmitt-trigger inputs. Each gate within the device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 0.8 V to 3.6 V High noise immunity Low static power consumption; ICC = 0.9 μA (maximum) Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10% of VCC IOFF circuitry provides partial power-down mode operation ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
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Suppliers

Company
Product
Description
Supplier Links
Low-power dual PCB configurable multiple function gate - 74AUP2G57GU-Q100X - Nexperia B.V.
Nijmegen, Netherlands
Low-power dual PCB configurable multiple function gate
74AUP2G57GU-Q100X
Low-power dual PCB configurable multiple function gate 74AUP2G57GU-Q100X
The 74AUP2G57-Q100 is a dual configurable multiple function gate with Schmitt-trigger inputs. Each gate within the device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 0.8 V to 3.6 V High noise immunity Low static power consumption; ICC = 0.9 μA (maximum) Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10% of VCC IOFF circuitry provides partial power-down mode operation ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

The 74AUP2G57-Q100 is a dual configurable multiple function gate with Schmitt-trigger inputs. Each gate within the device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND.

This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot < 10% of VCC
  • IOFF circuitry provides partial power-down mode operation
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Supplier's Site Datasheet
Config Multiple Func Gate, 3I/p,125Deg C Rohs Compliant Nexperia - 25AK1978 - Newark, An Avnet Company
Chicago, IL, United States
Config Multiple Func Gate, 3I/p,125Deg C Rohs Compliant Nexperia
25AK1978
Config Multiple Func Gate, 3I/p,125Deg C Rohs Compliant Nexperia 25AK1978
CONFIG MULTIPLE FUNC GATE, 3I/P,125DEG C ROHS COMPLIANT: YES

CONFIG MULTIPLE FUNC GATE, 3I/P,125DEG C ROHS COMPLIANT: YES

Supplier's Site

Technical Specifications

  Nexperia B.V. Newark, An Avnet Company
Product Category Logic Gates Logic Gates
Product Number 74AUP2G57GU-Q100X 25AK1978
Product Name Low-power dual PCB configurable multiple function gate Config Multiple Func Gate, 3I/p,125Deg C Rohs Compliant Nexperia
Supply Voltage 0.8 - 3.6
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