Nexperia B.V. Low-power 2-input NAND Schmitt trigger 74AUP1G132GN,132

  • Low-power 2-input NAND Schmitt trigger - 74AUP1G132GN,132 - Nexperia B.V.
    Nexperia B.V.
  • 74AUP1G132GN,132 - Rochester Electronics
    Rochester Electronics
  • Gates and Inverters - 74AUP1G132GN,132 - Quarktwin Technology Ltd.
    Quarktwin Technology Ltd.
  • Logic - Gates and Inverters - 74AUP1G132GN,132 - Nova Technology(HK) Co.,Ltd
    Nova Technology(HK) Co.,Ltd
  • Gates and Inverters - 1727-6819-2-ND - DigiKey
    DigiKey
  • Gates and Inverters - 1727-6819-1-ND - DigiKey
    DigiKey
  • Gates and Inverters - 1727-6819-6-ND - DigiKey
    DigiKey
  • Logic - Gates and Inverters - 74AUP1G132GN,132 - Lingto Electronic Limited
    Lingto Electronic Limited
  • Integrated Circuits (ICs) - Logic - Gates and Inverters - 74AUP1G132GN,132 - Shenzhen Shengyu Electronics Technology Limited
    Shenzhen Shengyu Electronics Technology Limited
Description
The 74AUP1G132 is a single 2-input NAND gate with Schmitt-trigger inputs. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 0.8 V to 3.6 V CMOS low power dissipation High noise immunity Overvoltage tolerant inputs to 3.6 V Low static power consumption; ICC = 0.9 μA (maximum) Latch-up performance exceeds 100 mA per JESD 78 Class II Low noise overshoot and undershoot < 10 % of VCC IOFF circuitry provides partial Power-down mode operation Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V ) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C Applications Wave and pulse shaper Astable multivibrator Monostable multivibrator.
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Suppliers

Company
Product
Description
Supplier Links
Low-power 2-input NAND Schmitt trigger - 74AUP1G132GN,132 - Nexperia B.V.
Nexperia B.V.
Nijmegen, Netherlands
Low-power 2-input NAND Schmitt trigger
74AUP1G132GN,132
Low-power 2-input NAND Schmitt trigger 74AUP1G132GN,132
The 74AUP1G132 is a single 2-input NAND gate with Schmitt-trigger inputs. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 0.8 V to 3.6 V CMOS low power dissipation High noise immunity Overvoltage tolerant inputs to 3.6 V Low static power consumption; ICC = 0.9 μA (maximum) Latch-up performance exceeds 100 mA per JESD 78 Class II Low noise overshoot and undershoot < 10 % of VCC IOFF circuitry provides partial Power-down mode operation Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V ) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C Applications Wave and pulse shaper Astable multivibrator Monostable multivibrator.

The 74AUP1G132 is a single 2-input NAND gate with Schmitt-trigger inputs. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 0.8 V to 3.6 V
  • CMOS low power dissipation
  • High noise immunity
  • Overvoltage tolerant inputs to 3.6 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C (2.7 V to 3.6 V )
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Applications

  • Wave and pulse shaper
  • Astable multivibrator
  • Monostable multivibrator.
Supplier's Site Datasheet
- 74AUP1G132GN,132 - Rochester Electronics
Rochester Electronics
Newburyport, MA, United States
74AUP1G132GN,132
74AUP1G132GN,132
Nexperia 74AUP1G132GN - NAND Gate, AUP/ULP/V Series, 1-Func, 2-Input, CMOS, X2SON6

Nexperia 74AUP1G132GN - NAND Gate, AUP/ULP/V Series, 1-Func, 2-Input, CMOS, X2SON6

Supplier's Site Datasheet
Gates and Inverters - 74AUP1G132GN,132 - Quarktwin Technology Ltd.
Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Gates and Inverters
74AUP1G132GN,132
Gates and Inverters 74AUP1G132GN,132
NAND Gate IC 1 Channel Schmitt Trigger 6-XSON (0.9x1)

NAND Gate IC 1 Channel Schmitt Trigger 6-XSON (0.9x1)

Supplier's Site Datasheet
Logic - Gates and Inverters - 74AUP1G132GN,132 - Nova Technology(HK) Co.,Ltd
Nova Technology(HK) Co.,Ltd
Futian District, Shenzhen, China
Logic - Gates and Inverters
74AUP1G132GN,132
Logic - Gates and Inverters 74AUP1G132GN,132
IC Channel

IC Channel

Supplier's Site Datasheet
Gates and Inverters - 1727-6819-2-ND - DigiKey
DigiKey
Thief River Falls, MN, United States
Gates and Inverters
1727-6819-2-ND
Gates and Inverters 1727-6819-2-ND
NAND Gate IC 1 Channel Schmitt Trigger 6-XSON (0.9x1)

NAND Gate IC 1 Channel Schmitt Trigger 6-XSON (0.9x1)

Supplier's Site Datasheet
Gates and Inverters - 1727-6819-1-ND - DigiKey
DigiKey
Thief River Falls, MN, United States
Gates and Inverters
1727-6819-1-ND
Gates and Inverters 1727-6819-1-ND
NAND Gate IC 1 Channel Schmitt Trigger 6-XSON (0.9x1)

NAND Gate IC 1 Channel Schmitt Trigger 6-XSON (0.9x1)

Supplier's Site Datasheet
Gates and Inverters - 1727-6819-6-ND - DigiKey
DigiKey
Thief River Falls, MN, United States
Gates and Inverters
1727-6819-6-ND
Gates and Inverters 1727-6819-6-ND
NAND Gate IC 1 Channel Schmitt Trigger 6-XSON (0.9x1)

NAND Gate IC 1 Channel Schmitt Trigger 6-XSON (0.9x1)

Supplier's Site Datasheet
Logic - Gates and Inverters - 74AUP1G132GN,132 - Lingto Electronic Limited
Lingto Electronic Limited
Shenzhen, China
Logic - Gates and Inverters
74AUP1G132GN,132
Logic - Gates and Inverters 74AUP1G132GN,132
IC GATE NAND 1CH 2IN 6XSON

IC GATE NAND 1CH 2IN 6XSON

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Gates and Inverters - 74AUP1G132GN,132 - Shenzhen Shengyu Electronics Technology Limited
Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Gates and Inverters
74AUP1G132GN,132
Integrated Circuits (ICs) - Logic - Gates and Inverters 74AUP1G132GN,132
IC GATE NAND 1CH 2-INP 6XSON

IC GATE NAND 1CH 2-INP 6XSON

Supplier's Site

Technical Specifications

  Nexperia B.V. Rochester Electronics Quarktwin Technology Ltd. Nova Technology(HK) Co.,Ltd DigiKey Lingto Electronic Limited Shenzhen Shengyu Electronics Technology Limited
Product Category Logic Gates Logic Gates Logic Gates Logic Gates Logic Gates Logic Gates Logic Gates
Product Number 74AUP1G132GN,132 74AUP1G132GN,132 74AUP1G132GN,132 74AUP1G132GN,132 1727-6819-2-ND 74AUP1G132GN,132 74AUP1G132GN,132
Product Name Low-power 2-input NAND Schmitt trigger Gates and Inverters Logic - Gates and Inverters Gates and Inverters Logic - Gates and Inverters Integrated Circuits (ICs) - Logic - Gates and Inverters
Gate Type NAND AND; NAND NAND; NAND Gate NOT NAND NOT; NAND NAND
Supply Voltage 0.8 - 3.6 3.6V; 0.8V ~ 3.6V 0.8V ~ 3.6V 0.6V ~ 2.29V (Low), 0.1V ~ 0.88V (High) 3.6V
Logic Family CMOS CMOS
Features Schmitt Trigger Schmitt Trigger
Propagation Delay 10 ns 7.8 ns
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