The 74ALVT162245 is a 16-bit transceiver with 30 Ω termination resistors and 3-state outputs. The device can be used as two 8-bit transceivers or one 16-bit transceiver. The device features two output enables (1OE and 2OE) each controlling eight outputs, and two send/receive (1DIR and 2DIR) inputs for direction control. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
Features and benefits
16-bit bidirectional bus interface
3-State buffers
Wide supply voltage range from 2.3 to 3.6 V
5V I/O compatible
Overvoltage tolerant inputs to 5.5 V
Output capability: +12 mA/–12 mA
Direct interface with TTL levels
Input and output interface capability to systems at 5 V supply
BiCMOS high speed and output drive
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
Live insertion/extraction permitted
Outputs include series resistance of 30 Ω making external termination resistors unnecessary
IOFF circuitry provides partial Power-down mode operation
Power-up 3-State
No bus current loading when output is tied to 5 V bus
Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C
The 74ALVT162245 is a 16-bit transceiver with 30 Ω termination resistors and 3-state outputs. The device can be used as two 8-bit transceivers or one 16-bit transceiver. The device features two output enables (1OE and 2OE) each controlling eight outputs, and two send/receive (1DIR and 2DIR) inputs for direction control. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
Features and benefits
- 16-bit bidirectional bus interface
- 3-State buffers
- Wide supply voltage range from 2.3 to 3.6 V
- 5V I/O compatible
- Overvoltage tolerant inputs to 5.5 V
- Output capability: +12 mA/–12 mA
- Direct interface with TTL levels
- Input and output interface capability to systems at 5 V supply
- BiCMOS high speed and output drive
- Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
- Live insertion/extraction permitted
- Outputs include series resistance of 30 Ω making external termination resistors unnecessary
- IOFF circuitry provides partial Power-down mode operation
- Power-up 3-State
- No bus current loading when output is tied to 5 V bus
- Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
- ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Specified from -40 °C to +85 °C
