Nexperia B.V. 20-bit buffer/line driver; non-inverting; with 30 Ohm termination resistors; 3-state 74ALVCH162827DGG:1

Description
The 74ALVCH162827 is a 20-bit buffer/line driver with bus hold inputs, 30 Ω termination resistors and 3-state outputs. The device can be used as two 10-bit buffers or one 20-bit buffer. The device features output enable (nOE1 and nOE2) inputs, each controlling 10-bits. A HIGH on either nOE1 or nOE2 causes the outputs to assume a high-impedance OFF-state. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits CMOS low power dissipation MULTIBYTE™ flow-through standard pin-out architecture Low inductance multiple VCC and GND pins for minimum noise and ground bounce Direct interface with TTL levels (2.7 V to 3.6 V) Bus hold on data inputs Current drive ± 12 mA at 3.0 V Integrated 30 Ω termination resistors Complies with JEDEC standards: JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
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20-bit buffer/line driver; non-inverting; with 30 Ohm termination resistors; 3-state - 74ALVCH162827DGG:1 - Nexperia B.V.
Nijmegen, Netherlands
20-bit buffer/line driver; non-inverting; with 30 Ohm termination resistors; 3-state
74ALVCH162827DGG:1
20-bit buffer/line driver; non-inverting; with 30 Ohm termination resistors; 3-state 74ALVCH162827DGG:1
The 74ALVCH162827 is a 20-bit buffer/line driver with bus hold inputs, 30 Ω termination resistors and 3-state outputs. The device can be used as two 10-bit buffers or one 20-bit buffer. The device features output enable (nOE1 and nOE2) inputs, each controlling 10-bits. A HIGH on either nOE1 or nOE2 causes the outputs to assume a high-impedance OFF-state. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits CMOS low power dissipation MULTIBYTE™ flow-through standard pin-out architecture Low inductance multiple VCC and GND pins for minimum noise and ground bounce Direct interface with TTL levels (2.7 V to 3.6 V) Bus hold on data inputs Current drive ± 12 mA at 3.0 V Integrated 30 Ω termination resistors Complies with JEDEC standards: JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

The 74ALVCH162827 is a 20-bit buffer/line driver with bus hold inputs, 30 Ω termination resistors and 3-state outputs. The device can be used as two 10-bit buffers or one 20-bit buffer. The device features output enable (nOE1 and nOE2) inputs, each controlling 10-bits. A HIGH on either nOE1 or nOE2 causes the outputs to assume a high-impedance OFF-state. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • CMOS low power dissipation
  • MULTIBYTE™ flow-through standard pin-out architecture
  • Low inductance multiple VCC and GND pins for minimum noise and ground bounce
  • Direct interface with TTL levels (2.7 V to 3.6 V)
  • Bus hold on data inputs
  • Current drive ± 12 mA at 3.0 V
  • Integrated 30 Ω termination resistors
  • Complies with JEDEC standards:
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8B/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
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Technical Specifications

  Nexperia B.V.
Product Category IC Interfaces
Product Number 74ALVCH162827DGG:1
Product Name 20-bit buffer/line driver; non-inverting; with 30 Ohm termination resistors; 3-state
Technology LVTTL
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