The ZL30367 is a IEEE 1588 and Synchronous Ethernet packet dual channel clock network synchronizer combining four DPLLs / NCOs with four programmable synthesizers. It is capable of accepting and generating any frequency from 1Hz to 750MHz on up to twelve input references and up to sixteen output clocks.
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Additional Features
Frequency and Phase Sync over Packet Networks
Two independent clock channels
Frequency accuracy performance for WCDMA-FDD, GSM, LTE-FDD and femtocell applications
Frequency performance for ITU-T G.823 and G.824 synchronization interface, as well as G.8261 PNT PEC and CES interfaces
Phase Synchronization performance for WCDMA-TDD, Mobile WiMAX, TD-SCDMA and CDMA2000 applications
Client holdover and reference switching between multiple Servers
Server, client and boundary scan operation
Any input clock rate from 1 kHz to 750 MHz
Automatic hitless reference switching and digital holdover on reference fail
Flexible two-stage architecture translates between arbitrary data, line coding and FEC rates
Digital PLLs programmable bandwidth at 5.2 Hz, 14 Hz, 28 Hz, 56 Hz, 112 Hz, 224 Hz, 448 Hz or 896 Hz
Three Programmable synthesizers
Any output clock rate from 1Hz to 750MHz
Output jitter below 660fs RMS
Up to four unique customer defined default configurations, including input/output frequencies, are available via OTP (One Time Programmable) memory
Easy configuration and dynamic programming via SPI/I2C interface
Operates from a single crystal resonator or clock oscillator
Typical Applications / Uses
ITU-T G.8262 Line Cards which support 1 GbE and 10 GbE interfaces
OTN Muxponders and transponders
10 Gigabit line cards
Synchronous Ethernet, 10 GBASE-R and 10 GBASE-W
SONET/SDH, Fibre Channel, XAUI
The ZL30367 is a IEEE 1588 and Synchronous Ethernet packet dual channel clock network synchronizer combining four DPLLs / NCOs with four programmable synthesizers. It is capable of accepting and generating any frequency from 1Hz to 750MHz on up to twelve input references and up to sixteen output clocks.
Click here for secure documentation
Additional Features
- Frequency and Phase Sync over Packet Networks
- Two independent clock channels
- Frequency accuracy performance for WCDMA-FDD, GSM, LTE-FDD and femtocell applications
- Frequency performance for ITU-T G.823 and G.824 synchronization interface, as well as G.8261 PNT PEC and CES interfaces
- Phase Synchronization performance for WCDMA-TDD, Mobile WiMAX, TD-SCDMA and CDMA2000 applications
- Client holdover and reference switching between multiple Servers
- Server, client and boundary scan operation
- Any input clock rate from 1 kHz to 750 MHz
- Automatic hitless reference switching and digital holdover on reference fail
- Flexible two-stage architecture translates between arbitrary data, line coding and FEC rates
- Digital PLLs programmable bandwidth at 5.2 Hz, 14 Hz, 28 Hz, 56 Hz, 112 Hz, 224 Hz, 448 Hz or 896 Hz
- Three Programmable synthesizers
- Any output clock rate from 1Hz to 750MHz
- Output jitter below 660fs RMS
- Up to four unique customer defined default configurations, including input/output frequencies, are available via OTP (One Time Programmable) memory
- Easy configuration and dynamic programming via SPI/I2C interface
- Operates from a single crystal resonator or clock oscillator
- Typical Applications / Uses
- ITU-T G.8262 Line Cards which support 1 GbE and 10 GbE interfaces
- OTN Muxponders and transponders
- 10 Gigabit line cards
- Synchronous Ethernet, 10 GBASE-R and 10 GBASE-W
- SONET/SDH, Fibre Channel, XAUI
