Microchip Technology, Inc. SONET/SDH System Synchronizer ZL30119

Description
The ZL30119 SONET/SDH Line Card Synchronizer is a highly integrated device that provides timing and synchronization for network interface cards. It incorporates two independent DPLLs, each capable of locking to one of eight input references and provides a wide variety of synchronized output clocks and frame pulses. Additional Features Synchronizes with standard telecom system references and synthesizes a wide variety of protected telecom line interface clocks that are compliant with Telcordia GR-253-CORE and ITU-T G.813 Internal APLL provides standard output clock frequencies up to 622.08 MHz that meet jitter requirements for interfaces up to OC-192/STM-64 Provides two DPLLs which are independently configurable through a serial peripheral interface Programmable output synthesizers (P0, P1) generate clock frequencies from any multiple of 8 kHz up to 77.76 MHz in addition to 2 kHz Provides 8 reference inputs which support clock frequencies with any multiples of 8 kHz up to 77.76 MHz in addition to 2 kHz Provides 3 sync inputs for output frame pulse alignment Generates several styles of output frame pulses with selectable pulse width, polarity, and frequency Configurable input to output delay, and output to output phase alignment
Datasheet
Description
The ZL30119 SONET/SDH Line Card Synchronizer is a highly integrated device that provides timing and synchronization for network interface cards. It incorporates two independent DPLLs, each capable of locking to one of eight input references and provides a wide variety of synchronized output clocks and frame pulses. Additional Features Synchronizes with standard telecom system references and synthesizes a wide variety of protected telecom line interface clocks that are compliant with Telcordia GR-253-CORE and ITU-T G.813 Internal APLL provides standard output clock frequencies up to 622.08 MHz that meet jitter requirements for interfaces up to OC-192/STM-64 Provides two DPLLs which are independently configurable through a serial peripheral interface Programmable output synthesizers (P0, P1) generate clock frequencies from any multiple of 8 kHz up to 77.76 MHz in addition to 2 kHz Provides 8 reference inputs which support clock frequencies with any multiples of 8 kHz up to 77.76 MHz in addition to 2 kHz Provides 3 sync inputs for output frame pulse alignment Generates several styles of output frame pulses with selectable pulse width, polarity, and frequency Configurable input to output delay, and output to output phase alignment
Datasheet

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SONET/SDH System Synchronizer - ZL30119 - Microchip Technology, Inc.
Chandler, AZ, United States
SONET/SDH System Synchronizer
ZL30119
SONET/SDH System Synchronizer ZL30119
The ZL30119 SONET/SDH Line Card Synchronizer is a highly integrated device that provides timing and synchronization for network interface cards. It incorporates two independent DPLLs, each capable of locking to one of eight input references and provides a wide variety of synchronized output clocks and frame pulses. Additional Features Synchronizes with standard telecom system references and synthesizes a wide variety of protected telecom line interface clocks that are compliant with Telcordia GR-253-CORE and ITU-T G.813 Internal APLL provides standard output clock frequencies up to 622.08 MHz that meet jitter requirements for interfaces up to OC-192/STM-64 Provides two DPLLs which are independently configurable through a serial peripheral interface Programmable output synthesizers (P0, P1) generate clock frequencies from any multiple of 8 kHz up to 77.76 MHz in addition to 2 kHz Provides 8 reference inputs which support clock frequencies with any multiples of 8 kHz up to 77.76 MHz in addition to 2 kHz Provides 3 sync inputs for output frame pulse alignment Generates several styles of output frame pulses with selectable pulse width, polarity, and frequency Configurable input to output delay, and output to output phase alignment

The ZL30119 SONET/SDH Line Card Synchronizer is a highly integrated device that provides timing and synchronization for network interface cards. It incorporates two independent DPLLs, each capable of locking to one of eight input references and provides a wide variety of synchronized output clocks and frame pulses.

Additional Features

  • Synchronizes with standard telecom system references and synthesizes a wide variety of protected telecom line interface clocks that are compliant with Telcordia GR-253-CORE and ITU-T G.813
  • Internal APLL provides standard output clock frequencies up to 622.08 MHz that meet jitter requirements for interfaces up to OC-192/STM-64
  • Provides two DPLLs which are independently configurable through a serial peripheral interface
  • Programmable output synthesizers (P0, P1) generate clock frequencies from any multiple of 8 kHz up to 77.76 MHz in addition to 2 kHz
  • Provides 8 reference inputs which support clock frequencies with any multiples of 8 kHz up to 77.76 MHz in addition to 2 kHz
  • Provides 3 sync inputs for output frame pulse alignment
  • Generates several styles of output frame pulses with selectable pulse width, polarity, and frequency
  • Configurable input to output delay, and output to output phase alignment
Supplier's Site Datasheet

Technical Specifications

  Microchip Technology, Inc.
Product Category Network Clock Sources
Product Number ZL30119
Product Name SONET/SDH System Synchronizer
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