Microchip Technology, Inc. 16-bit DSC for Precision Motor Control DSPIC33FJ32MC302

The dsPIC33F 16-bit device family employs a powerful 16-bit architecture, ideal for applications that rely on high-speed, repetitive computations, as well as control. The devices are pin compatible with the PIC24HJ family of devices, and share a very high degree of compatibility with the dsPIC30F family devices. This allows seamless migration options from/to PIC24F, dsPIC30F and dsPIC33F devices. Additional Features Operating Conditions: 3.0V to 3.6V, -40ºC to +150ºC, DC to 20 MIPS 3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS High-Performance DSC CPU: Modified Harvard architecture C compiler optimized instruction set 16-bit wide data path 24-bit wide instructions Linear program memory addressing up to 4M instruction words Linear data memory addressing up to 64 Kbytes 83 base instructions: mostly 1 word/1 cycle Two 40-bit accumulators with rounding and saturation options Flexible and powerful addressing modes: Indirect, Modulo and Bit-Reversed Software stack 16 x 16 fractional/integer multiply operations 32/16 and 16/16 divide operations Single-cycle multiply and accumulate: Accumulator write back for DSP operations and Dual data fetch Up to ±16-bit shifts for up to 40-bit data On-Chip Flash and SRAM: Flash program memory Data SRAM Boot, Secure, and General Security for program Flash Direct Memory Access (DMA): 8-channel hardware DMA Up to 2 Kbytes dual ported DMA buffer area (DMA RAM) to store data transferred via DMA Allows data transfer between RAM and a peripheral while CPU is executing code (no cycle stealing) Most peripherals support DMA Timers/Capture/Compa re/PWM: Timer/Counters, up to five 16-bit timers: Can pair up to make two 32-bit timers One timer runs as a Real-Time Clock with an external 32.768 kHz oscillator and Programmable prescaler Input Capture (up to four channels): Capture on up, down or both edges 16-bit capture input functions and 4-deep FIFO on each capture Output Compare (up to four channels): Single or Dual 16-bit Compare mode and 16-bit Glitchless PWM mode Hardware Real-Time Clock/Calendar (RTCC): Provides clock, calendar, and alarm functions Interrupt Controller: 5-cycle latency 118 interrupt vectors Up to 53 available interrupt sources Up to three external interrupts Seven programmable priority levels Five processor exceptions Digital I/O: Peripheral pin Select functionality Up to 35 programmable digital I/O pins Wake-up/Interrupt-on -Change for up to 21 pins Output pins can drive from 3.0V to 3.6V Up to 5V output with open drain configuration All digital input pins are 5V tolerant 4 mA sink on all I/O pins System Management: Flexible clock options: External, crystal, resonator, internal RC, Fully integrated Phase-Locked Loop (PLL) and Extremely low jitter PLL Power-up Timer Oscillator Start-up Timer/Stabilizer Watchdog Timer with its own RC oscillator Fail-Safe Clock Monitor Reset by multiple sources Power Management: On-chip 2.5V voltage regulator Switch between clock sources in real time Idle, Sleep, and Doze modes with fast wake-up Analog-to-Digital Converters (ADCs): 10-bit ADC, 1.1 Msps or 12-bit, 500 Ksps conversion: two and four simultaneous samples Up to nine input channels with auto-scanning Conversion start can be manual or synchronized with one of four trigger sources and possible in Sleep mode ±2 LSb max integral nonlinearity and ±1 LSb max differential nonlinearity Comparator Module: Two analog comparators with programmable input/output configuration CMOS Flash Technology: Low-power, high-speed Flash technology Fully static design 3.3V (±10%) operating voltage Industrial and Extended temperature Low power consumption Motor Control Peripherals: 6-channel 16-bit Motor Control PWM: three duty cycle generators Independent or complementary mode and programmable dead time and output polarity Edge-aligned or center-aligned, manual output override control, and one Fault input Trigger for ADC conversions PWM frequency for 16-bit resolution (@ 40 MIPS) = 1220 Hz for Edge-Aligned mode, 610 Hz for Center-Aligned mode PWM frequency for 11-bit resolution (@ 40 MIPS) = 39.1 kHz for Edge-Aligned mode, 19.55 kHz for Center-Aligned mode 2-channel 16-bit Motor Control PWM One duty cycle generator, Independent or Complementary mode and programmable dead time and output polarity Edge-aligned or center-aligned, manual output override control and one fault input Trigger for ADC conversions PWM frequency for 16-bit resolution (@ 40 MIPS) = 1220 Hz for Edge-Aligned mode, 610 Hz for Center-Aligned mode PWM frequency for 11-bit resolution (@ 40 MIPS) = 39.1 kHz for Edge-Aligned mode, 19.55 kHz for Center-Aligned mode 2-Quadrature Encoder Interface modules Phase A, Phase B, and index pulse input and 16-bit up/down position counter