Nexperia B.V. Octal D-type transparent latch; 3-state 74ALVC373BQ,115

Description
The 74ALVC373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 1.65 V to 3.6 V CMOS low power dissipation Overvoltage tolerant inputs to 3.6 V Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 250 mA per JESD78 Class II.A Complies with JEDEC standards: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C
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Product
Description
Supplier Links
Octal D-type transparent latch; 3-state - 74ALVC373BQ,115 - Nexperia B.V.
Nijmegen, Netherlands
Octal D-type transparent latch; 3-state
74ALVC373BQ,115
Octal D-type transparent latch; 3-state 74ALVC373BQ,115
The 74ALVC373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 1.65 V to 3.6 V CMOS low power dissipation Overvoltage tolerant inputs to 3.6 V Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 250 mA per JESD78 Class II.A Complies with JEDEC standards: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C

The 74ALVC373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches.

Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 3.6 V
  • CMOS low power dissipation
  • Overvoltage tolerant inputs to 3.6 V
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • Latch-up performance exceeds 250 mA per JESD78 Class II.A
  • Complies with JEDEC standards:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supplier's Site Datasheet
Logic - Latches - 74ALVC373BQ,115 - Lingto Electronic Limited
Shenzhen, China
Logic - Latches
74ALVC373BQ,115
Logic - Latches 74ALVC373BQ,115
IC OCTAL D TRANSP LATCH 20DHVQFN

IC OCTAL D TRANSP LATCH 20DHVQFN

Supplier's Site Datasheet
Latches - 74ALVC373BQ,115 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-DHVQFN (4.5x2.5)

D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-DHVQFN (4.5x2.5)

Supplier's Site Datasheet
Latches - 1727-74ALVC373BQ,115TR-ND - DigiKey
Thief River Falls, MN, United States
D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-DHVQFN (4.5x2.5)

D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-DHVQFN (4.5x2.5)

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Latches - 74ALVC373BQ,115 - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Latches
74ALVC373BQ,115
Integrated Circuits (ICs) - Logic - Latches 74ALVC373BQ,115
IC D-TYPE TRANSP SGL 8:8 20HVQFN

IC D-TYPE TRANSP SGL 8:8 20HVQFN

Supplier's Site
Yishun, Singapore
Logic - Logic - Latches - 74ALVC373BQ,115
765233-74ALVC373BQ,115
Logic - Logic - Latches - 74ALVC373BQ,115 765233-74ALVC373BQ,115
Manufacturer: Nexperia USA Inc. Win Source Part Number: 765233-74ALVC373BQ,1 15 Series: 74ALVC Packaging: Reel package Operating Temperature Range: -40°C ~ 85°C Package: 20-VFQFN Exposed Pad Mounting: SMD Logic Type: D-Type Transparent Latch Output Type: Tri-State Current - Output High, Low: 24mA, 24mA Operating Supply Voltage: 1.65 V ~ 3.6 V Independent Circuits: 1 Delay Time - Propagation: 2.2ns Family Name: 74ALVC373 Categories: Integrated Circuits (ICs) Manufacturer Package: 20-DHVQFN (4.5x 2.5) Alternative Parts (Cross-Reference): 74ALVC373PW,112; 74ALVC373PW; 74ALVC373D; Introduction Date: February 26, 2002 ECCN: EAR99 Country of Origin: Thailand Estimated EOL Date: 2027 Halogen Free: Compliant Popularity: Medium Fake Threat In the Open Market: 68 pct. Supply and Demand Status: Limited

Manufacturer: Nexperia USA Inc.
Win Source Part Number: 765233-74ALVC373BQ,115
Series: 74ALVC
Packaging: Reel package
Operating Temperature Range: -40°C ~ 85°C
Package: 20-VFQFN Exposed Pad
Mounting: SMD
Logic Type: D-Type Transparent Latch
Output Type: Tri-State
Current - Output High, Low: 24mA, 24mA
Operating Supply Voltage: 1.65 V ~ 3.6 V
Independent Circuits: 1
Delay Time - Propagation: 2.2ns
Family Name: 74ALVC373
Categories: Integrated Circuits (ICs)
Manufacturer Package: 20-DHVQFN (4.5x 2.5)
Alternative Parts (Cross-Reference): 74ALVC373PW,112; 74ALVC373PW; 74ALVC373D;
Introduction Date: February 26, 2002
ECCN: EAR99
Country of Origin: Thailand
Estimated EOL Date: 2027
Halogen Free: Compliant
Popularity: Medium
Fake Threat In the Open Market: 68 pct.
Supply and Demand Status: Limited

Supplier's Site Datasheet
Latch, D Type Transparent, -40To85Deg C Rohs Compliant Nexperia - 74AH2233 - Newark, An Avnet Company
Chicago, IL, United States
Latch, D Type Transparent, -40To85Deg C Rohs Compliant Nexperia
74AH2233
Latch, D Type Transparent, -40To85Deg C Rohs Compliant Nexperia 74AH2233
LATCH, D TYPE TRANSPARENT, -40TO85DEG C ROHS COMPLIANT: YES

LATCH, D TYPE TRANSPARENT, -40TO85DEG C ROHS COMPLIANT: YES

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Lingto Electronic Limited Quarktwin Technology Ltd. DigiKey Shenzhen Shengyu Electronics Technology Limited Win Source Electronics Newark, An Avnet Company
Product Category Logic Latches Logic Latches Logic Latches Logic Latches Logic Latches Logic Latches Logic Latches
Product Number 74ALVC373BQ,115 74ALVC373BQ,115 74ALVC373BQ,115 1727-74ALVC373BQ,115TR-ND 74ALVC373BQ,115 765233-74ALVC373BQ,115 74AH2233
Product Name Octal D-type transparent latch; 3-state Logic - Latches Latches Latches Integrated Circuits (ICs) - Logic - Latches Logic - Logic - Latches - 74ALVC373BQ,115 Latch, D Type Transparent, -40To85Deg C Rohs Compliant Nexperia
Latch Type Transparent-D D; Transparent-D Transparent-D
Output Characteristics 3-State 3-State
Features ESD Protection
Supply Voltage 1.8V; 2.5V; 3V; 3.3V; 3.6V; 1.65 - 3.6 3.6V; 1.65V ~ 3.6V 1.65V ~ 3.6V 3.6V 1.65 V ~ 3.6 V
Propagation Delay 2.2 ns 2.2 ns 2.2 ns 2.2 ns
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