Allied Electronics, Inc. Datasheets for Flip-Flops
Flip-flops are digital logic devices that synchronize changes in output state (1 or 0) according to a clocked input.
Flip-Flops: Learn more
| Product Name | Notes |
|---|---|
| -0.5 to +7 V, +⁄- 0.1 uA (Max.), Octal D-Type Flip Flop High speed High noise immuinity Low power dissipation This 8 bit D-type flip flop is controlled by a... | |
| -0.5 to +7 V, +⁄- 20 mA, Octal D Type Flip Flop With Clear High speed High noise immunity Low power dissipation The M74HC273 is an high speed CMOS Octal... | |
| 15 ns (Typ.) Propagation Delay Time, Octal D-type Flip-flop with Reset Positive-edge Trigger Ideal buffer for MOS microprocessor or memory Common clock and master reset Eight positive edge-triggered D-type flip-flops... | |
| 18 V, 100 mW, -55 to +125°C, CMOS Dual D Type Flip-Flop Set-Reset Capability Standardized Symmetrical Output Characteristics 100% Tested for Quiescent Current at 20 V The CD4013B types are... | |
| 40 uA (Max.) Quiescent Supply, Dual D-type Flip-Flop with Set and Reset Positive-Edge Triggers Wide supply voltage range from 2.0 to 6.0 V Symmetrical output impedance High noise immunity Low... | |
| 500 ns (Max.) @ 4.5 V Input Rise Time, Octal Edge-Triggered D-Type Flip-Flop With 3-State Outputs Wide operating voltage range of 2 V to 6 V High-current 3-state outputs drive... | |
| CMOS Logic, D Flip-Flop, PDIP16, Pb-Free | |
| CMOS Logic, Dual D F/F with Set and Reset, PDIP14, Pb-Free | |
| CMOS Logic, Dual D Flip-Flop, PDIP14, Pb-Free | |
| CMOS Logic, Dual D Flip-Flop, SOIC14, Pb-Free | |
| CMOS Logic, Dual J-K Flip-Flop, PDIP16,Pb-Free | |
| CMOS Logic, Hex D Flip-Flop, PDIP16, Pb-Free | |
| CMOS Logic, Octal 3-State Noninverting D Flip-Flop, PDIP-20, Pb-Free | |
| DUAL D-TYPE FLIP FLOP | |
| Dual J-K Negative-Edge-Trigge red Flip-Flop with Preset and Clear Fully buffered to offer maximum isolation from external disturbance -1.5 V (max.) input clamp voltage, 3.4 V (typ.) output high level... | |
| Dual, Positive Edge Trigger, With Set and Reset, DIP-14 Package, Flip Flops Wide supply voltage range from 2 to 6 V Symmetrical output impedance High noise immunity | |
| FLIP FLOP DUAL D-TYPE, 14 PIN DIP | |
| FLIP FLOP; OCTAL D-TYPE FLIP FLOP; 20-LEAD PDIP; 5 V (TYP.); 17 MA (TYP.) | |
| FLIP-FLOP, D-TYPE; F-TTL; -18 MA (MAX.); PDIP-14; 0 DEGC; 70 DEGC | |
| FLIP-FLOP, D-TYPE; HEX D TYPE; 20 V; 1 TO 6.8 MA (TYP.) (SINK); 500 MW; | |
| FLIP-FLOP, DUAL D TYPE; TTL; PDIP; 7 V;2.4 MA (TYP.); 2 V; 0.8 V; 5 V | |
| Flip-Flop; Dual D Type; 3v; -550c to +1250c; 14pin - DIP | |
| LATCH; N PACKAGE; PDIP; 7 V; 27 MA (TYP.); 2 V; 0.8 V; 3.1 V (TYP.) | |
| Octal D Type, Positive Edge Triggered, 3 State, 5 V Supply Voltage, Flip Flops 3 state non inverting outputs for bus oriented applications 8 bit positive edge triggered register Common... | |
| Octal D-type Flip-Flop Positive Edge-trigger 3-State SOIC Package, ICs 3-state non-inverting outputs for bus oriented applications 8-bit positive edge-triggered register Common 3-state output enable input Independent register and 3-state buffer... | |
| OCTAL D-TYPE FLIP/FLOP W/ENABL | |
| Octal, D Type, Positive Edge Trigger, With Reset, 5 V Supply Voltage, Flip Flops Ideal buffer for MOS microprocessor or memory Common clock and master reset Eight positive edge-triggered d... | |
| PDIP Package Type, CMOS Dual J-K Master-Slave Flip-Flop Set-Reset capability Medium speed operation Maximum input current The CD4027B types are sapplied in 16-lead hermetic Dual In Line ceramic packages (F3A... | |
| PDIP, 5 V (Typ.), -40 to +85°C, Octal D Type Flip-flop with clears Outputs can drive up to 10 LSTTL loads ±4 mA output drive at 5 V Low input... | |
| Positive Edge Trigger, 3 state, 5 V, -40°C to +125°C, 3.5 pF, 6 ns, Octal D Type Flip-Flop 3 state non inverting outputs for bus oriented applications 8 bit positive... | |
| SOIC Package, 5 V (Nom.) Supply Voltage, Quad D Type Flip-Flops The devices contain two independent D-type positive-edge-trigge red flip-flops.A low level at the preset (PRE) or clear (CLR) inputs... |