Clock and Data Distribution -- SY10/100E337




The SY10/100E337 are 3-bit registered bus transceivers with scan designed for use in new, high- performance ECL systems. The bus outputs (BUS0-BUS2) are designed to drive a 25Ω bus; the receive outputs (Q0-Q2) are designed for 50Ω. The bus outputs feature a normal logic HIGH level (VOH) and a cutoff LOW level of -2.0V and the output emitter-follower is "off", presenting a high impedance to the bus. The bus outputs also feature edge slow-down capacitors.
Both drive and receive sides feature the same logic, including a loopback path to hold data. The LOAD/HOLD function is controlled by Transmit Enable (TEN) and Receive Enable (REN) on the transmit and receive sides, respectively, with a HIGH selecting LOAD. The implementation of the E337 Receive Enable differs from that of the E336.A synchronous bus enable (SBUSEN) is provided for normal, non-scan operation. The asynchronous bus disable (ABUSDIS) disables the bus for scan mode.The SYNCEN input allows either synchronous or asynchronous re-enabling after disabling with ABUSDIS.
An alternative use is asynchronous-only operation with ABUSDIS, in which case SYNCEN is tied LOW. SYNCEN is implemented as an overriding SET control to the enable flip-flop.Scan mode is selected by a logic HIGH at the SCAN input. Scan input data is shifted in through S-IN, and output data appears at the Q2 output.All registers are clocked on the rising edge of CLK. Additional lead-frame grounding is provided through the ground pins (GND) which should be connected to 0V. The GND pins are not electrically connected to the chip.
Additional Features
- 1500psmax clock to bus (data transmit)
- 1000psmax clock to Q (data receive)
- Extended 100E VEE range of -4.2V to -5.5V
- 25Ω cutoff bus outputs
- 50Ω receiver outputs
- Scannable implementation of E336
- Synchronous and asynchronous bus enables
- Non-inverting data path
- Bus outputs feature internal edge slow-down capacitors
- Additional package ground pins
- Fully compatible with industry standard 10KH, 100K ECL levels
- Internal 75KΩ input pulldown resistors
- Fully compatible with Motorola MC10E/100E337
- Available in 28-pin PLCC package